Reorganizing

6 files changed, 223 insertions, 0 deletions

diff --git a/arch/x86_64/boot/README.md b/arch/x86_64/boot/README.md
new file mode 100644
index 0000000..c7cc505
--- /dev/null
+++ b/arch/x86_64/boot/README.md
@@ -0,0 +1,5 @@
+
+Most of the code in this folder is based on Philipp Oppermann's blog os.
+https://github.com/phil-opp/blog_os
+
+Copyright (c) 2019 Philipp Oppermann
diff --git a/arch/x86_64/boot/boot.asm b/arch/x86_64/boot/boot.asm
new file mode 100644
index 0000000..2e334a8
--- /dev/null
+++ b/arch/x86_64/boot/boot.asm
@@ -0,0 +1,163 @@
+global start
+extern long_mode_start
+
+section .text
+bits 32
+start:
+    mov esp, stack_top
+
+    call check_multiboot
+    call check_cpuid
+    call check_long_mode
+
+    call set_up_page_tables
+    call enable_paging
+
+    ; load the 64-bit GDT
+    lgdt [gdt64.pointer]
+
+    jmp gdt64.code:long_mode_start
+
+    ; print `OK` to screen
+    mov dword [0xb8000], 0x2f4b2f4f
+    hlt
+
+check_multiboot:
+    cmp eax, 0x36d76289
+    jne .no_multiboot
+    ret
+.no_multiboot:
+    mov al, "0"
+    jmp error
+
+check_cpuid:
+    ; Check if CPUID is supported by attempting to flip the ID bit (bit 21)
+    ; in the FLAGS register. If we can flip it, CPUID is available.
+
+    ; Copy FLAGS in to EAX via stack
+    pushfd
+    pop eax
+
+    ; Copy to ECX as well for comparing later on
+    mov ecx, eax
+
+    ; Flip the ID bit
+    xor eax, 1 << 21
+
+    ; Copy EAX to FLAGS via the stack
+    push eax
+    popfd
+
+    ; Copy FLAGS back to EAX (with the flipped bit if CPUID is supported)
+    pushfd
+    pop eax
+
+    ; Restore FLAGS from the old version stored in ECX (i.e. flipping the
+    ; ID bit back if it was ever flipped).
+    push ecx
+    popfd
+
+    ; Compare EAX and ECX. If they are equal then that means the bit
+    ; wasn't flipped, and CPUID isn't supported.
+    cmp eax, ecx
+    je .no_cpuid
+    ret
+.no_cpuid:
+    mov al, "1"
+    jmp error
+
+check_long_mode:
+    ; test if extended processor info in available
+    mov eax, 0x80000000    ; implicit argument for cpuid
+    cpuid                  ; get highest supported argument
+    cmp eax, 0x80000001    ; it needs to be at least 0x80000001
+    jb .no_long_mode       ; if it's less, the CPU is too old for long mode
+
+    ; use extended info to test if long mode is available
+    mov eax, 0x80000001    ; argument for extended processor info
+    cpuid                  ; returns various feature bits in ecx and edx
+    test edx, 1 << 29      ; test if the LM-bit is set in the D-register
+    jz .no_long_mode       ; If it's not set, there is no long mode
+    ret
+.no_long_mode:
+    mov al, "2"
+    jmp error
+
+; Prints `ERR: ` and the given error code to screen and hangs.
+; parameter: error code (in ascii) in al
+error:
+    mov dword [0xb8000], 0x4f524f45
+    mov dword [0xb8004], 0x4f3a4f52
+    mov dword [0xb8008], 0x4f204f20
+    mov byte  [0xb800a], al
+    hlt
+
+set_up_page_tables:
+    ; map first P4 entry to P3 table
+    mov eax, p3_table
+    or eax, 0b11 ; present + writable
+    mov [p4_table], eax
+
+    ; map first P3 entry to P2 table
+    mov eax, p2_table
+    or eax, 0b11 ; present + writable
+    mov [p3_table], eax
+
+    ; map each P2 entry to a huge 2MiB page
+    mov ecx, 0         ; counter variable
+.map_p2_table:
+    ; map ecx-th P2 entry to a huge page that starts at address 2MiB*ecx
+    mov eax, 0x200000  ; 2MiB
+    mul ecx            ; start address of ecx-th page
+    or eax, 0b10000011 ; present + writable + huge
+    mov [p2_table + ecx * 8], eax ; map ecx-th entry
+
+    inc ecx            ; increase counter
+    cmp ecx, 512       ; if counter == 512, the whole P2 table is mapped
+    jne .map_p2_table  ; else map the next entry
+
+    ret
+
+enable_paging:
+    ; load P4 to cr3 register (cpu uses this to access the P4 table)
+    mov eax, p4_table
+    mov cr3, eax
+
+    ; enable PAE-flag in cr4 (Physical Address Extension)
+    mov eax, cr4
+    or eax, 1 << 5
+    mov cr4, eax
+
+    ; set the long mode bit in the EFER MSR (model specific register)
+    mov ecx, 0xC0000080
+    rdmsr
+    or eax, 1 << 8
+    wrmsr
+
+    ; enable paging in the cr0 register
+    mov eax, cr0
+    or eax, 1 << 31
+    mov cr0, eax
+
+    ret
+
+section .bss
+align 4096
+p4_table:
+    resb 4096
+p3_table:
+    resb 4096
+p2_table:
+    resb 4096
+stack_bottom:
+    resb 64
+stack_top:
+
+section .rodata
+gdt64:
+    dq 0 ; zero entry
+.code: equ $ - gdt64
+    dq (1<<43) | (1<<44) | (1<<47) | (1<<53) ; code segment
+.pointer:
+    dw $ - gdt64 - 1
+    dq gdt64
diff --git a/arch/x86_64/boot/grub.cfg b/arch/x86_64/boot/grub.cfg
new file mode 100644
index 0000000..7c34c9c
--- /dev/null
+++ b/arch/x86_64/boot/grub.cfg
@@ -0,0 +1,7 @@
+set timeout=0
+set default=0
+
+menuentry "ats-os" {
+    multiboot2 /boot/kernel.bin
+    boot
+}
diff --git a/arch/x86_64/boot/linker.ld b/arch/x86_64/boot/linker.ld
new file mode 100644
index 0000000..5d788f1
--- /dev/null
+++ b/arch/x86_64/boot/linker.ld
@@ -0,0 +1,16 @@
+ENTRY(start)
+
+SECTIONS {
+    . = 1M;
+
+    .boot :
+    {
+        /* ensure that the multiboot header is at the beginning */
+        *(.multiboot_header)
+    }
+
+    .text :
+    {
+        *(.text)
+    }
+}
diff --git a/arch/x86_64/boot/long_mode_init.asm b/arch/x86_64/boot/long_mode_init.asm
new file mode 100644
index 0000000..eab3788
--- /dev/null
+++ b/arch/x86_64/boot/long_mode_init.asm
@@ -0,0 +1,17 @@
+global long_mode_start
+
+section .text
+bits 64
+long_mode_start:
+    ; load 0 into all data segment registers
+    mov ax, 0
+    mov ss, ax
+    mov ds, ax
+    mov es, ax
+    mov fs, ax
+    mov gs, ax
+
+    ; print `OKAY` to screen
+    mov rax, 0x2f592f412f4b2f4f
+    mov qword [0xb8000], rax
+    hlt
diff --git a/arch/x86_64/boot/multiboot_header.asm b/arch/x86_64/boot/multiboot_header.asm
new file mode 100644
index 0000000..9a9289c
--- /dev/null
+++ b/arch/x86_64/boot/multiboot_header.asm
@@ -0,0 +1,15 @@
+section .multiboot_header
+header_start:
+    dd 0xe85250d6                ; magic number (multiboot 2)
+    dd 0                         ; architecture 0 (protected mode i386)
+    dd header_end - header_start ; header length
+    ; checksum
+    dd 0x100000000 - (0xe85250d6 + 0 + (header_end - header_start))
+
+    ; insert optional multiboot tags here
+
+    ; required end tag
+    dw 0    ; type
+    dw 0    ; flags
+    dd 8    ; size
+header_end: